Japanese Laid-Open Patent Publication No. 2013-84692 describes a wiring substrate incorporating an electronic component such as a chip type capacitor element (chip capacitor). The wiring substrate includes a core substrate, and the core substrate includes an accommodation hole (cavity) that accommodates the electronic component. The wiring substrate includes a wiring pattern and a via (via wire) to electrically connect the electronic component to a semiconductor chip that is mounted on the wiring substrate.